•By default, all signals will be exported. To exclude a signal from the export, double click on the signal name to open the Signals Properties  dialog and uncheck the Export Signal box.

•Notice the colored direction icons show that the signal will be exported. The grey versions show that the export is unchecked and will not be exported.

•If you are exporting to a pattern generator, then you may want to edit the pod mapping as described in Section 11.4 Map Signals to Test Equipment Pins.

•Select the Import/Export > Set Clocking Signal for Export menu to open the Set Clocking Signal for Export dialog.

•Choose the signal that you wish to use for the clocking signal from the drop down list.

•Usage Trick: Putting grid lines on positive edges of the export clock helps show which signal values will be exported (See Section 2.3: Grid Lines on Clocks)

•Select the Import/Export > Export Timing Diagrams As menu option to open a special version of the Save As dialog which remembers the file type of the last file exported.

•Select an export format from the Save as type box, enter a file name, and click OK to generate the file.

•Note: Once WaveFormer successfully creates the file it will display it in the Report window so that you can quickly verify that the file is correct. If you cannot see the Report window then choose the Window > Report menu to bring it to the front.

•VHDL and Verilog Formats are covered in Section 4.4 Export VHDL and Verilog. These can create pure stimulus models or automatically wrap the testbench around the model. There is also some VHDL library features that effect the generated code.

•Waveforms can also be exported directly to VCD to create files that can be read by other EDA tools and test equipment.

VHDL 

VHDL w/ Top Level Test Bench 

Verilog 

Verilog w/ Top Level Test Bench 

Verilog Change Dump (*.vcd)

•The Spice formats are covered in Section 8.5 Exporting SPICE Stimulus. Each signal has analog properties that determine how the export is accomplished. The Spice formats are generic formats and HSpice, PSpice, and HSim work with those programs.

Spice sources

Spice sources with brackets

HSpice sources

PSpice digital

HSim Spice

•The TDML format is an industry standard XML format called the Timing Diagram Markup Language it is covered in Section 11.13 TDML Management.

TDML

Third Party simulator and timing analysis formats are mostly straight ASCII output that are easy to figure out. Use the documentation from those tools and generate a few files to see how the code looks.

•The Altera format is clocked and is covered in Section 11.9 ALTERA Max Plus II Simulator - Export.

Model Force File

ALTERA Vector format (Binary)

ALTERA Vector format (Hex)

Xilinx/Aldec/Orbit

Workview CMD

Mentor QuickSim II

PLA Format

Abel stimulus

Abel Pins stimulus

Spectre

The Test Equipment Formats are all clocked file formats that require a clocking signal to be set in the diagram, and most also require a pod mapping to be defined. See:

•Section 11.7 Agilent Pattern Generator - Export

•Section 11.10 Pulse Instruments Pattern Generator - Export

•Section 11.12 STIL Test Vectors - Export

•Section 11.15 Tektronix Pattern Generator - Export

Agilent Pattern Generator(disk)

Agilent Pattern Generator (bus)

Agilent 167xx Pattern Generator (binary)

Agilent 169xx Pattern Generator Full Mode

Agilent 169xx Pattern Generator Half Mode

PI-2005 Pattern Generator

STIL Test Vectors

Tektronix Test Vector Spreadsheet clocked

Spreadsheet Formats are covered under the Section 11.11 Spreadsheets - Import and Export. These are all closely related formats and can be used for many different programs.

Test Vector Spreadsheet

Test Vector Spreadsheet without Timing

Tektronix Test Vector Spreadsheet clocked

SynaptiCAD Formats

•Timing Diagram - Binary (*.btim) is the default format for the program and it saves everything in a fast binary file format.

•Timing Diagram (*.tim) is an older ASCII form of the the BTIM and was the standard format before version 8.0. These files can be manually edited.

Timing Diagram - Binary

Timing Diagram

Free Parm

Text Free Parm

Text Free Parm with Margins

Timing Analysis Report

Waveform Filter

•Free Parm (*.fp) saves just the free parameters  in the Timing Diagram format. This is one way to make a library file.

•Text Free Parm (*.txt) saves just the free parameters in a spreadsheet compatible format: comma or tab separated with a header (first line must be "NAME, MIN, MAX, COMMENT"). This is the standard way to make a library file. This is also compatible with Chronology® library files (formulas are not supported).

•Text Free Parm with Margins looks like the Text Free Parm format, but it includes an extra column with the margin information shown in the parameter window. This format is primarily for import into a spreadsheet for documentation purposes; it should not be used to create parameter libraries.

•Timing Analysis Report generates a report of all the timing calculations performed by the tool's timing analysis engine. It includes computations of parameter values, edge times, and setup and hold margin calculations. This report is for documentation purposes. See Section 1.5 Measuring Time and State values.

•Waveform Filter generates a "filter file" that contains only the signal properties, but now waveform data. Filter files can be used to selectively load waveform data from another waveform file and overwrite signal properties from that file. For example, a filter file can be used to load a subset of signals from a VCD file and set the input/output type of the signals. See Section 11.2 Import General Instructions to show how to use filter files.