6.9 Input Data Dynamically from a File (VHDL)

VHDL test benches can read data from a file during simulation. This is not supported in Verilog, but there is a way to mimic this feature by initializing an array during the test bench build process as described in Section 6.10 (Verilog) Initialize Array from File or Section 6.11 (VHDL) Initialize Array from File.

To read data from a file, first create a Test Vector data file and put it in the File Input folder. TestBencher will parse the file and create a project-level variable of type File Input to read from the file. This variable is defined by a class with fields (one field per column in the test vector spreadsheet file). Inside a timing diagram, the @FileName_in.ColumnName notation can be used to access the file variable in waveforms, delays, setups, holds, markers, and the conditional and action fields of Samples. Each time a diagram transaction is applied, TestBencher will read the next data line from the input file.

1) Create a data file:

Create a tab separated text file with data as described in Section 6.7 SynaptiCAD Test Vector File Format using a spreadsheet program or a timing diagram. The data values read from the test vector file during the simulation run are not allowed prefixes that indicate the radix type (e.g. A4 is allowed for a hex value in the file, but 'hA4 is not). Below is an example of a legal test vector input file:

[Vectors] Radix=hex

Addr Data[7:0](bin)

A4 10110011

54 11011010

....

2) Add Test Vector File to project to Automatically create file class and variable:

•Under the Test Vector Lists folder, right click on File Input to open the context menu.

file_input_menu

•Choose one of the menu options to attach the file to the project and create the file class and variables. The Add Files to menus will add the file and path to the project. The Copy Files to will make a local copy of the file in the project directory.

Investigate the file class and variable that was created:

•Right click on the Class Library List folder and choose Classes and Variables to open the Classes and Variables dialog.

Cv_dlg_opening_just_class

•In the Class Definitions tab, notice that a class was created and named filename_STRUCTURE. The fields of the structure are the column headings of the file.

file_class

file_fields

•In the Variables tab, notice that a file variable named filename was created. Its Structure type will be File Input. The Data Type will be the class that defines the fields of the file, filename_STRUCTURE.

file_variable

•At the bottom of the Variables tab is the File Name with Structure Definition/Initialization box that shows the name of the associated file.

•If you make changes to the input file's header (e.g. signal names, signal sizes, etc), select the row containing the File Input variable and press the Reparse File to force TestBencher to update the class and variables associated with this file.

file_name_with_structure

3) Accessing the File Variable:

Once a file variable is created at the project level, its fields can be accessed in any of the project's timing diagrams. Use the @filevariablename_in.fieldname to read or write to a field. This code can be entered anywhere a variable can be used, such as in a waveform state (Section 2.4 Waveform States and Conditions), samples (Section 3.2 Sample Checking and Actions), parameters (Chapter 4: Transaction Delays, Setups, and Holds), and in markers (Section 5.6 HDL Code Markers).

Causing an input line to be read from a file:

•Apply a Timing Diagram: If an input file variable is accessed within a timing diagram transactor, one line will be read from the file into the file variable each time the transactor begins a transaction. If the file variable is referenced again in the same transaction, the values will come from the original read of the file. The next time a transactor is called that references the file variable, the next line will be read from the file.

•Force a Read: By default, only one line is read from a file when a transactor is triggered by an Apply call that references an input file variable. So even if you put the reference inside a loop in a transactor, the same value will be used on each iteration of the loop, by default. If you want to read another line from the file inside a loop in a transactor, you will need to tell the transactor to read the next line from the file. One way to do that is to add an "HDL Code" time marker inside the loop and have it execute a call similar to this:

ReadFromFile(filename_in, filename_in_handle);

This says read the next line from the file into the filename_in file variable. This will fill the fields of this structure with the new address and data values from the next line in the file.

For output files, a line of data is written at the end of any transaction that references the file variable.