9.3 Golden Reference Models

TestBencher can generate C++, VHDL and Verilog golden reference models that run in parallel with a VHDL or Verilog RTL model. Golden reference models are high-level descriptions of a design and are used to compare to the results of the model under test during simulation. Reference models usually model interaction between components at the transaction level (e.g. read transaction/write transaction) instead of at the signal level. When the reference model is created, the apply calls will call both the diagram transactions and the equivalent reference model transaction. At the end of each transaction the outputs for the MUT and the reference model are compared and logged to the simulation log file.

tb_golden_reference_model

TestBencher generates all of the stub-functions for the golden reference model, keeping the transaction interface to the reference model the same as the HDL level model. TestBencher uses the TestBuilder library to generate C++ models. The user writes the behavioral C++, VHDL or Verilog code inside the stub-functions that enables the golden reference model to emulate the model under test.

To enable Reference Model Generation:

•Right click on the Transaction-Level Model folder and choose Project Generation Properties from the context menu to open the Project Generation Properties dialog.

Project_properties_menu_just_component

•Check the Enable Reference Model checkbox and click OK to close the dialog.

EnableReferenceModel

•During the next code generation TestBencher will generate either a C++ or Verilog reference module depending on the generation language. Step 6: Generate the TestBench describes how to generate the project code.

•The reference model file is written to the Project directory and is named projectName_skeleton with the appropriate extension for the language (.cpp, .vhd or .v). For C++ there is also a header file named projectName_emulator.h that contains the class declaration for the reference model.

•Copy the projectName_skeleton.cpp, .vhd or .v to a file named projectName_emulator.cpp, .vhd or .v.

•Inside projectName_emulator file uncomment any functions that you want to model, and insert behavioral code into the functions.

•Step 7: Setup External Simulators describes how to setup the C++ compiler so the TestBencher can compile the model and hand it off to the HDL simulator.

•During the simulation, the reference model will automatically compare the results of the MUT to the results of the reference model and send the results to the simulation log file.