•An Interactive Simulator lets you describe waveforms using Boolean and registered logic equations instead of having to draw them manually.

•Delay, Setup, and Hold parameters allow you to document the causal relationships between the waveform edges making the timing diagrams more readable.

•Logic Analyzer and Pattern Generator support lets you move test data back and forth between the simulation and hardware prototyping environment. You can capture an existing hardware interface using a logic analyzer and use WaveFormer Pro to translate the data into a VHDL or Verilog testbench. And WaveFormer Pro can take your simulation output waveforms and convert them into stimulus files for the pattern generator.

•Professional Documentation features enable you to create timing diagrams that are "ready for publication" in design documentation, data books, or on web sites.

•Analog Signal Display feature shows analog signals as a magnitude plot rather than the digital bus display, allowing you to view the signal as it would display on a digitizing oscilloscope. Every signal has an Analog Display check box in the Signal Properties dialog and the height of each signal is individually controllable. Analog signals can be displayed using either point-to-point or step-function plots.

•VeriLogger Pro is a new type of Verilog simulation environment that combines all the features of a traditional Verilog simulator with the most powerful graphical test vector generator on the planet. Model testing is so fast in VeriLogger Pro that you can perform true bottom-up testing of every model in your design, a critical step often skipped in the race to market.

•TestBencher Pro generates VHDL and Verilog bus-functional model test benches that can be used to test large systems. In comparison, WaveFormer Lite generates simple stimulus-based test benches. TestBencher Pro automates the most tedious aspects of test bench development, allowing you to focus on the design and operation of the test bench. This is accomplished by representing each bus transaction graphically and then automatically generating the code for each transaction. TestBencher makes use of the powerful features of the language that is being generated and the engineer does not have to hand-code each transaction. When hand coding, the designer would have to take the time to deal with the specifics of the design (port information, monitoring system response, etc.) as well as common programming errors (race conditions, minor logic errors, and code design problems). This removes a considerable amount of time from the test bench design process because TestBencher manages the low-level details and automatically generates a valid test bench.

•Install and run your new SynaptiCAD product.

•Select the Options > General Preferences menu option to open the General Preferences dialog.

•In the Substitute for WaveFormer Lite drop-down menu, select the product you purchased.

•Click OK to close the dialog. This will save a special option in the .ini file that will automatically launch your other program instead of WaveFormer Lite when you use Libero.

•Run Libero and double-click on the WaveFormer Lite icon in the project window. This will launch your new SynaptiCAD product.

•Phone sales: 1-800-804-7073

•Phone tech support: 1-(540)-953-3390

•Fax: 1-(540)-953-3078

•Email: [email protected]

•Web Site: www.syncad.com (the web site will also have the latest WaveFormer Lite software which is usually a few months newer than the product that Libero ships).