BugHunter Pro and the VeriLogger Simulators

3.2 Drawing Waveforms for Stimulus Generation

3.2 Drawing Waveforms for Stimulus Generation

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3.2 Drawing Waveforms for Stimulus Generation

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BugHunter can generate stimulus code for signals drawn in the Stimulus and Results diagram and use that code as inputs to the project. At the beginning of a compile, BugHunter will take the drawn waveforms and create a stimulus component. It will also create a top-level component that will hook up the stimulus component to your design models. This section covers how to get the timing diagram and test bench to hook-up properly. Instructions for drawing waveforms are in the Timing Diagram Editor Manual Chapter 1: Signals, but if you watch the waveform buttons and the cursor shape as you left click in the waveform window you can probably figure it out.

Setting up BugHunter to Use Drawn Test Benches:

Verify that the Simulate > Simulate Diagram With Project menu item is checked. This option lets BugHunter create the stimulus and wrapper components.

Make sure the simulation mode is set to Debug Run, rather than Auto Run, so that the simulator does not re-simulate while you are drawing.

Also, verify that the testbench generation language in the drop-down list box beside the Debug Run button is correct.

The basic steps for creating a stimulus test bench are:

Press the Parse MUT button  to populate the Stimulus and Results diagram with the MUT's input and output ports. By default, BugHunter will automatically choose a likely candidate for the model under test, but you can specify one or more models as models under test (see Section 1.5 Draw a Test Bench for more information on manually setting the models under test).

Draw waveforms on the test bench output signals with the icons pointing to the left. These are inputs to the models under test.

The inputs to the test bench are marked with icons pointing to the right. They will be grey, unless you have the Reactive Test Bench option. When you simulate, they will turn purple and show the results of the models under test.

If you have the Reactive Test Bench option, then the inputs will be black and you can draw expected response from the MUTs (which will draw in blue). See the Reactive Test Bench Manual for these instructions.

Run a Simulation as discussed in Section 2.2 Build and Simulate.

Unit Level testing (automatic simulations):

After you have sketched most of the testbench, press the   Debug Run button to change it to Auto Run. Now simulations are automatically rerun each time you change the drawn waveforms.

Stimulus for Internal Signals:

BugHunter can generate stimulus for signal nodes internal to the models under test (Verilog only). All you need to do is add the internal signal's name to the Stimulus and Results diagram using the full Hierarchical name and draw the waveforms. An easy way to add the signal is to:

Find the internal signal in the Project window Simulated Models tree, then right click and choose the Watch menu to add the signal to the diagram window.

Double click on the signal in the diagram window to open the Signal Properties dialog.

Press the Drive button (clearing the watch type). Press OK to close the dialog.

Now you can draw on the signal. The purple waveform icon means that it is an internal signal.

Stimulus for Inout Signals:

BugHunter can graphically generate stimulus for inout ports and simultaneously watch the port's simulated output using another signal with the same name and set one to drive and one to watch.

Add two signals with the same full hierarchical name and a direction of inout.

Double click on one signal and make it a Drive signal to generate stimulus for the port. Then draw on it to set the test bench stimulus values. Remember to draw tri-state values on the drive signal when the testbench should not be driving the inout port.

Double click on the other signal and select the Watch radio button. This signal will capture the waveform state changes when the simulation is run.