Congratulations, you have completed the Random Transactions tutorial. To convert a regular VHDL project into one that applies random transactions, the following changes were required:
•In the sequencer process, you can make another call to the SetTransactorWeightings function call to redefine the random weightings table that specifies the probability that a particular master transaction will be applied after another type of transaction. By default, the transactions will all have the same probability of being generated. •Probably keep all the slave transaction apply calls the same, because clock processes and slave transactors have to start and stop at particular times in the test bench operation (generally at the beginning and end of the test bench). •Replace some or all of the master transactor apply calls in the sequencer with PostRandomTransactionType calls to randomly post transactions to the BFM's queue. •Add a wait statement to the code or somehow make sure that the simulator will keep running while there are transactions in the queue waiting to be started. •Constrain the input data going into the transactors by double clicking on the Class Library List folder in the Project tree under the Component Model section. Select a transactor diagram, then press the Constraints button to view and edit the constraints for that transactor's input variables. •The InitializeUniform function can be called again to replace the default seeds for the random number generator. |