•Open the Simulated Models folder and drill down as shown to find the tb_status signal of the tbwrite_0 transactor.

•Right click on the status signal and choose Watch Connection from the right click context menu to send this signal to the Stimulus and Results Diagram.

•Do the same steps for the tb_status signal of the tbread_0 transactor.

•When you are done, the tb_status signals will be displayed in the diagram window. After simulation, you will be able to see the state of the status signals go to TB_ONCE when the  associated transactor is active.

•Press the Make TB button. This will expand the macros in the template file and pop up a dialog that says "Finished generating test bench. Please check waveperl.log for errors." Close this dialog by clicking the OK button.

•In the Report window, check the waveperl.log tab to see if TestBencher encountered any errors during test bench generation. If it did, fix the error and regenerate the test bench. (If you cannot see the Report window, choose the Window > Report menu to bring it to the front.)

•Click the yellow Compile Model and Test Bench  button. This builds (parses) the project using the tools specified in the Project Settings and Simulator and Compiler Settings dialogs.

•In the bottom right corner, a yellow Simulation Built status message indicates the build was successful and that you are ready to simulate. If the status indicates an error, the Errors tab in the Report window will display the compile errors. If there are errors, fix them, regenerate the test bench, and recompile.

•Click the green Run button  on the simulation button bar. This will simulate the design and display the results in the StimulusAndResults diagram and the Report window simulation.log tab.

•In the bottom right corner, a Simulation Good status message indicates that the simulation has reached a successful end.