Congratulations on completing the SDC Timing Generation Tutorial. Any timing diagram can generate SDC commands. However, when starting with a new timing diagram specifically for generating SDC commands, it is usually a good idea to create all the clocks first. Next, work through each external device by adding the control and data signals and the associated timing parameters. Signals that are inputs to your design will usually have associated delays relative to the clock that can be obtained from external device datasheets (i.e. clock-to-output times). Similarly, outputs from your FPGA will need to meet the setup and hold times specified by external device datasheets.