(TD) 2.8 End Diagram Marker Stops Simulation |
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(TD) 2.8 End Diagram Marker Stops Simulation |
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(TD) 2.8 End Diagram Marker Stops Simulation |
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(TD) 2.8 End Diagram Marker Stops Simulation |
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Normally the simulation will continue to the end of the last drawn signal or about one clock cycle past the drawn signal. However, the exact end of simulation can be controlled using Marker line.
Use an End Diagram Marker to control the end of simulation time:
•Press the Marker button so that right clicks will add marker lines to the diagram. |
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•Right click inside the diagram window to add a Marker line. By default all new markers are just documentation lines that will not effect the timing or simulation of the diagram. |
•Double click on MARK0 to open the Edit Time Marker dialog. •Set the type to End Diagram. But also notice all the other types available. The timebreak types compress time and hide parts of the dialog. The loop markers are used by TestBencher and Reactive Test Bench generation to create complex test bench code. •Set the display label to Type. This will make the marker display its type instead of its name. Also notice all the display label options to control exactly what the marker displays. •Press the Ok button to close the dialog |
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•Notice that the simulation ends at the clock cycle after the End Diagram Marker. Grab the marker with the mouse and drag it around to control the simulation end. |
