SynaptiCAD Tutorials

(TBench) 2.6 Draw a Read Cycle and Verify the read

(TBench) 2.6 Draw a Read Cycle and Verify the read

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(TBench) 2.6 Draw a Read Cycle and Verify the read

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In this section, we will draw a read cycle and define the bidirectional segment on the DATA signal.

Draw the Waveforms for the Read cycle

Either load the completed read cycle timing diagram draw_single_read.btim located in the SynaptiCAD\Examples\TutorialFiles\ReactiveTestBench\Completed Diagrams directory.

Or draw the waveforms for the read which starts at 400ns. (See the instrutions below for making the multi-colored Data signal).

drawSingleRead

Draw the Waveforms for the Read cycle:

To avoid bus contention, the test bench must not drive the DATA bus during the read cycle, because the MUT will be driving that bus. Since the DATA bus is a bi-directional signal, you can specify which parts of the waveform are driven by the test bench and which are not. One-way to do this is to draw a tri-state waveform. However, in this case we need to specify the expected data on the bus, so we will have to disable the drive on the expected value segments.

Double-click on the waveform segment of DATA that happens during the read cycle to open the Edit Bus State dialog.

Uncheck the Driven check box and click OK.

data_edit_bus_state_dlg

Notice that the segment will be drawn in blue now, indicating that the DATA signal will not be driven by the test bench during this time period (just like the entire TRDY signal).