BugHunter Pro and the VeriLogger Simulators

Chapter 11: Schematic Viewing of Gate Level Designs

Chapter 11: Schematic Viewing of Gate Level Designs

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Chapter 11: Schematic Viewing of Gate Level Designs

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While debugging a gate-level design, it is often useful to view the design as a schematic, especially when tracing cause-effect relationships between signals. BugHunter can launch Gates-on-the-Fly to display components and signals on a schematic window. Gates-on-the-Fly(GOF) is a third party tool that is usually used to graphically analyze and edit large Verilog netlists that have been generated from a synthesis or layout tool. A separate GOF license is required to fully enable this capability.